In the simplest form, an organic electroluminescent (EL) device is comprised of an organic electroluminescent media disposed between first and second electrodes serving as an anode for hole injection and a cathode for electron injection. The organic electroluminescent media supports recombination of holes and electrons that yields emission of light. These devices are also commonly referred to as organic light-emitting diodes, or OLEDs. A basic organic EL element is described in U.S. Pat. No. 4,356,429. In order to construct a pixelated OLED display device that is useful as a display such as, for example, a television, computer monitor, cell phone display, or digital camera display, individual organic EL elements can be arranged as pixels in a matrix pattern. These pixels can all be made to emit the same color, thereby producing a monochromatic display, or they can be made to produce multiple colors such as a three-pixel red, green, blue (RGB) display. OLED display devices have also been fabricated with active matrix (AM) driving circuitry in order to produce high performance displays. An example of such an AM OLED display device is disclosed in U.S. Pat. No. 5,550,066. Active matrix circuitry is commonly achieved by forming thin film transistors (TFTs) over a substrate and the Organic electroluminescent media over the TFTs.
These TFTs are composed of a thin layer (usually 100-400 nm) of a semiconductor such as amorphous silicon or polysilicon. The properties of such thin film semiconductors are, however, often not sufficient for constructing a high quality OLED display. Amorphous silicon, for example, is unstable in that its threshold voltage (Vth) and carrier mobility shifts over extended periods of use. Polysilicon, often has a large degree of variability across the substrate in threshold voltage (Vth) and carrier mobility due to the crystallization process. Since OLED devices operate by current injection, variability in the TFTs can result in variability of the luminance of the OLED pixels and degrade the visual quality of the display. Novel compensation schemes, such as adding additional TFT circuitry in each pixel, have been proposed to compensate for TFT variability, however, such compensation adds complexity which can negatively impact yield, cost, or reduce the OLED emission area. Furthermore, as thin film transistor fabrication processes are applied to larger substrates such as used for large flat-panel television applications, the variability and process cost increase.
One approach to avoid these issues with thin film transistors is instead to fabricate conventional transistors in a semiconductor substrate and then transfer these transistors onto a display substrate. U.S. Patent Application Publication No. 2006/0055864 A1 by Matsumura et al. teaches a method for the assembly of a display using semiconductor integrated circuits (ICs) affixed within the display for controlling pixel elements where the embedded transistors in the ICs replace the normal functions performed by the TFTs of prior art displays. Matsumura teaches that the semiconductor substrate should be thinned, for example by polishing, to a thickness of between 20 micrometers to 100 micrometers. The substrate is then diced into smaller pieces containing the integrated circuits, hereafter referred to as ‘chiplets’. Matsumura teaches a method cutting the semiconductor substrate, for example by etching, sandblasting, laser beam machining, or dicing. Matsumura also teaches a pick up method where the chiplets are selectively picked up using a vacuum chuck system with vacuum holes corresponding to a desired pitch. The chiplets are then transferred to a display substrate where they are nested in a thick thermoplastic resin.
The process taught by Matsumura, however, has several disadvantages. First, semiconductor substrates are typically 500 micrometers to 700 micrometers in thickness. Thinning the substrate in this fashion is difficult and at low thicknesses, the crystalline substrate is very fragile and easily broken. Therefore the chiplets are very thick, at least 20 micrometers according to Matsumura. It is desirable that the chiplets have a thickness of less than 20 micrometers, and preferably less than 10 micrometers. It is also desirable to include multiple metal wiring layers in the chiplet, thus the thickness of the semiconductor portion of the chiplet must be substantially thinner than the total thickness of the chiplet. The thick chiplets of Matsumura result in substantial topography across the substrate, which makes the subsequent deposition and patterning of metal layers over the chiplets difficult. For example, Matsumura describes concave deformations as one undesirable effect. Thinner chiplets would reduce these topography problems and facilitate formation of the subsequent layers above the chiplets.
Another disadvantage of the process taught by Matsumura is that the surface area of the chiplets must be large enough to be picked up by the vacuum hole fixture. As a result, the chiplets must have a length and a width that are larger than the minimum size of the vacuum hole. It is desirable that the surface area of the chiplet be small to enable high resolution displays and so that many chiplets can be produced on a single substrate thereby enabling a low unit production cost. It is also desirable that the shape of the chiplet be made to fit between pixels and not block light emission. Therefore, the chiplet should have a length or width that is narrow compared to the other dimension so that it can be placed in the spacing between the rows or the columns of pixels.
A process of transferring transistor circuits is taught in U.S. Pat. No. 7,169,652 by Kimura. In this process, thin film transistors are formed and wired into circuits on a “transfer origin substrate” over a peeling layer. The circuits are then flipped over and attached to a display substrate. The circuits are released from the transfer origin substrate by light irradiation of the peeling layer. This arrangement can be called a “pad-down” configuration. Because the process of Kimura requires the circuits to be flipped over in a pad-down configuration, electrical connections between the circuit and wiring lines formed on the display substrate are made by “local formation” of a conductive adhesive layer between the circuits and the substrate.
The process of Kimura has several disadvantages. First, it is difficult to achieve high quality semiconductors since thin film layers of semiconductor must be formed over a release layer. It is desirable to use high quality crystalline semiconductors, such as that of a crystalline silicon wafer to achieve the best transistor performance. Second, this approach requires the additional cost of forming in isolated beads of conductive adhesive. Third, it is difficult to achieve a high yield of good quality electrical connections by aligning to the small beads of conductive adhesive. It is therefore desirable to avoid the need for patterned conductive adhesive.